FIG. 1 shows a configuration of a circuit of a single pixel (pixel circuit) in a basic active organic EL display device. FIG. 2 shows one example of a configuration of a display module and an input signal.
As shown in FIG. 1, a pixel circuit is composed of a selection TFT 2 in which either a source or a drain is connected to a data line Data and a gate is connected to a gate line Gate, a drive TFT 1 having a gate connected to either the source or the drain of the selection TFT 2 and a source connected a power supply PVdd, a storage capacitor C connecting between the gate and the source of the drive TFT 1, and an organic EL element 3 having an anode connected to the drain of the drive TFT 1 and a cathode connected to a low voltage power supply CV.
Further, as shown in FIG. 2, pixels 14, each having the pixel circuit as shown in FIG. 1, are arranged in a matrix to form a display section. A source driver 10 and a gate driver 12 are provided to drive the pixels of the display section.
An image data signal, a horizontal synchronization signal, a pixel clock, and other drive signals are supplied to the source driver 10, and a horizontal synchronization signal, a vertical synchronization signal, and other drive signals are supplied to the gate driver 12. The data lines Data extend from the source driver 10 for the respective columns of the pixels 14 in the vertical direction, while the gate lines Gate extend from the gate driver 12 for the respective rows of the pixels 14 in the horizontal direction.
When the gate line (Gate) extending in the horizontal direction is set to a high level to turn on the selection TFT 2, and, while in this state, a data signal having a voltage based on the display brightness is fed to the data lines extending in the vertical direction, a data signal is stored in the storage capacitor C. Subsequently, the drive TFT 1 supplies a drive current based on the data signal stored in the storage capacitor C to the organic EL element 3, and the organic EL element emits light.
Here, the current and the amount of luminescence in the organic EL element 3 are substantially proportional to each other. Typically, a voltage (Vth) that causes a drain current to start to flow at a level near the black level of an image is applied across the gate and the PVdd (Vgs) of the drive TFT 1. Further, as an amplitude of the image signal, an amplitude by which a predetermined brightness is achieved at a level near the white level is applied.
FIG. 3 shows a relationship between an input signal voltage (voltage of the data line Data) of the drive TFT 1 and a CV current flowing in the organic EL element 3 (corresponding to brightness). By setting a data signal (data voltage) such that Vb is applied as a black level voltage and Vw is applied as a white level voltage, it is possible to control the amount of luminescence from black to white in the organic EL element 3 and appropriately perform gradation control. Here, as is apparent from FIG. 3, the voltage input to a pixel (data voltage) and the current are not completely proportional to each other. Accordingly, as shown in FIG. 4, image data and brightness are placed in a linear relationship through gamma correction circuits (γLUT) 16 (16r, 16g, and 16b). An image data signal is a signal indicating brightness for each pixel, and, because the image data signal is a color signal, it is composed of color-specific image data signals rn, gn, and bn. As such, the three gamma correction circuits 16r, 16g, and 16b corresponding to colors R, G, and B, respectively, are provided, and these gamma correction circuits output the gamma-corrected image data signals Rn, Gn, and Bn, respectively. As such, the image data signals Rn, Gn, and Bn are supplied to the source driver 10. These image data signals are then supplied to the data lines Data and further supplied to R display pixels 14, G display pixels 14, and B display pixels 14, respectively. As shown in the figure, the source driver 10 includes a shift register 10a that temporarily stores the image data signal for each pixel, and a data latch and D/A 10b that latches image data signals for one horizontal line stored in the shift register 10a, simultaneously performs D/A conversion on the data for one horizontal line, and outputs the results. Further, a region in which a plurality of pixels 14 are arranged in a matrix is illustrated as an effective pixel region 18 of a display panel. Displaying is performed in this region based on the image data signals.
Here, when a single pixel is driven at a certain input voltage, its brightness varies with Vth of the drive TFT 1. An input voltage near PVdd-Vth is equivalent to a signal voltage for displaying black color. Likewise, a slope (μ) of a V-I curve of the TFT also often varies. In such a case, an input amplitude (Vp-p) to achieve a given brightness varies, and an amplitude from a voltage for displaying the black level to a voltage for displaying the white level also varies.
Variance in the Vth or the μ of the drive TFT 1 of the pixels 14 in the display panel (pixel matrix: effective pixel region) usually results in uneven brightness of the display panel. In order to correct such uneven brightness, the pixels are illuminated at several different signal levels, and panel currents flowing therein are measured to thereby obtain V-I curves of the drive TFTs 1 of the individual pixels. Then, unevenness in brightness can be reduced by calculating correction data for each pixel based on the measured V-I curve for each of the pixels, performing calculation using the calculated correction data and the original image data signal, and supplying the result to the panel (see U.S. Pat. Nos. 7,345,660; 6,633,135; 7,199,602, 6,518,962 and U.S. Patent Application Publication No. 2007/0210996).
Further, although stray capacitance and resistance components caused by wiring are not illustrated in the pixel circuit shown in FIG. 1, in reality, in consideration of wiring resistance, stray capacitance, and other factors, the respective types of wiring lines include distributed constant circuits (RC distributed constant circuits) 20 as shown in FIG. 5. That is, there are provided a distributed constant circuit 20-1 on the gate line Gate, a distributed constant circuit 20-2 on the data line, a distributed constant circuit 20-3 on the power supply line, and a distributed constant circuit 20-4 between the organic EL element 3 and the power source CV. Because, as shown in FIG. 2, the PVDD line (power supply line) is connected to a plurality of pixels, under the presence of resistance components, the voltage at the source of the drive TFT 1 driving an organic EL element 3 changes depending on the size of currents of other pixels. In other words, with the plurality of pixels being connected to the same PVDD line, the voltage drops by a greater amount when the currents in the pixels are greater. When the selection TFT 2 is turned on and the data voltage is written in the storage capacitor C in a state where the source voltage of the drive TFT 1 is dropped, an absolute value of Vgs becomes smaller and a pixel current (CV current) flowing in the organic EL element 3 is reduced, resulting in lower brightness. FIG. 6 shows a phenomenon referred to as crosstalk caused by the above-described voltage drop in a panel in which power supply lines are provided in parallel to the horizontal lines of the pixels. When a white window is displayed on a gray background, the brightness in portions b and c is darker than in portions d and e. This phenomenon occurs because a current in a horizontal line containing white color is greater than a current in a horizontal line containing no white color, and the voltage drop becomes greater.
In order to address such a problem, U.S. Pat. No. 7,071,635 discloses predicting currents flowing in pixels of a horizontal line from data of all the pixels of the horizontal line, obtaining voltage drops in data voltages supplied to the pixels based on resistance in the power supply line and the predicted currents, and supplying image data signals corrected based on the obtained result. With such a configuration, it is possible to virtually cancel the voltage drop caused by the resistance components in the power supply line extending in the horizontal direction.
However, in this case, resistance in the vertical power supply line which connects between power supply lines of the horizontal lines and supplies power to these horizontal power supply lines must be negligible. If the vertical power supply line includes a resistance component, the brightness changes in the vertical direction due to a voltage drop caused by the resistance component.
As described above, a pixel current is measured by writing pixel data in the storage capacitor C and then monitoring the PVDD or the CV current. However, the current to be measured changes due to, for example, wiring resistance and stray capacitance, and gradually increases after the pixel data are written in the storage capacitor C. As such, the current must be measured after the current is sufficiently stabilized, and a considerable amount of time is required to measure pixel currents for all effective pixels after stabilization.
FIG. 7 shows an example of a relationship between the current Id flowing in the organic EL element 3 and the PVDD current (current Ipvdd flowing from the power supply PVDD). As shown in this figure, a considerable amount of time is required for stabilization of the current flowing in a PVdd in each of the pixels.
In addition, an unevenness correction value does not usually take into consideration a supply voltage drop at a pixel circuit. The accuracy of such correction therefore becomes worse as the voltage to be supplied to the pixel is reduced. It is thus understood that supply voltage drops are preferably corrected at the same time as unevenness in the pixels, as in U.S. Pat. No. 7,071,635 as described above. However, when a vertical PVDD line includes a resistance component, uneven distribution of supply voltages occurs in the vertical direction, and this causes display unevenness.